Optimum Layout of Multiplexer with Minimal Average Power based on IWO, Fuzzy-IWO, GA, and Fuzzy GA

This article is based on the application of heuristic algorithms to solve the optimum solution for a VLSI circuit. The idea is to find the optimum layout for a 2-to-1 multiplexer with minimal average power. The objective function is the average power of 2:1 MUX with four MOSFETs with different channel widths. They make a four dimensional space which is searched by search agents of algorithm. Motivated by the convergence of Invasive Weeds Optimization (IWO) and Genetic Algorithm (GA) and the link of MATLAB with HSPICE Software the optimized layout of 2:1 MUX is obtained. Based on IWO, Fuzzy-IWO, GA, FuzzyGA algorithms the best resulting of MUX layout in Static NMOS Logic in 0.18μm Technology with supply voltage of 5v has the average power consumption of 3.6 nW with Fuzzy-IWO.